Embedded systems architecture research focuses on models and tools for multicore SoC design, including FPGA prototyping and testing, optimization and testing of memory hierarchies in embedded systems, on-chip buses and point-to-pont NoCs with monitoring services, and application-specific SoCs, e.g. ASIPs, hardware accelerators.
In addition, electronic design automation activities focus on RTL and system-level (SystemC-based) design methodologies, models and tools for system-on-chip and network-on-chip design. These tools support many innovative ideas, such as power-awareness, reliability, discrete-event co-simulation, instrumentation and advanced monitoring.
Extensive prior expertise has been obtained through in-depth involvement in numerous Greek government research programmes (GSRT, Ministry of Education), European R&D projects (Esprit, TEN Telecom, Eurescom, Medea+, IST, Artemis, ENIAC) and cutting-edge industrial technological development projects with international industry, such as STMicroelectronics, Thales and ESA, strong partnership with prestigious Universities and prominent Greek and international industry for expanding knowledge and pursuing applied technological innovations leading to contribution to standardization activities (e.g. HLM, SystemC) and real commercial products (e.g. Synopsys Cocentric Studio and Spidergon STNoC), and active involvement in open source software (http://occn.sourceforge.net). More than 250 organizations worldwide, including prestigious schools, research institutions and semiconductor, electronics and EDA industry, have already used the heavily cited on-chip communication network (OCCN) software library and design methodology.